In semiconductor device manufacturing, a conductive material, such as copper, is often deposited by electroplating onto a seed layer of metal to fill one or more recessed features on a semiconductor wafer substrate. Electroplating is a method of choice for depositing metal into the vias and trenches of the wafer during damascene processing, and is also used in wafer level packaging (WLP) applications to form pillars and lines of metal on the wafer substrate. Another application of electroplating is filling of Through-Silicon Vias (TSVs), which are relatively large vertical electrical connections used in 3D integrated circuits and 3D packages.
In some electroplating substrates, the seed layer is exposed over the entire surface of the substrate prior to electroplating (typically in damascene and TSV processing), and electrodeposition of metal occurs over the entirety of the substrate. In other electroplating substrates, a portion of the seed layer is covered by a non-conducting material, such as by photoresist, while another portion of the seed layer is exposed. In such substrates with partially masked seed layer electroplating occurs only over the exposed portions of the seed layer, while the covered portions of the seed layer are protected from being plated upon. Electroplating on a substrate having a seed layer that is coated with patterned photoresist is referred to as through resist plating and is typically used in WLP applications.
During electroplating, electrical contacts are made to the seed layer (e.g., a copper seed layer) at the periphery of the wafer, and the wafer is electrically biased to serve as a cathode. The wafer is brought into contact with an electrolyte, which contains ions of metal to be plated. The electrolyte typically also includes an acid that provides sufficient conductivity to the electrolyte and may also contain additives, known as accelerators, suppressors, and levelers that modulate electrodeposition rates on different surfaces of the substrate.
One of the problems encountered during electroplating is non-uniform distribution of thickness of electrodeposited metal along the radius of the circular semiconductor wafer. This type of non-uniformity is known as radial non-uniformity. Radial non-uniformity may occur due to a variety of factors, such as due to a terminal effect, and due to variations in electrolyte flow at the surface of the substrate. Terminal effect manifests itself in edge-thick electroplating, because the potential in the vicinity of the electrical contacts at the edge of the wafer can be significantly higher than at the center of the wafer, particularly if a thin resistive seed layer is used.
Another type of non-uniformity, which can be encountered during electroplating is azimuthal non-uniformity. For clarity, we define azimuthal non-uniformity, using polar coordinates, as thickness variations exhibited at different angular positions on the wafer at a fixed radial position from the wafer center, that is, a non-uniformity along a given circle or portion of a circle within the perimeter of the wafer. This type of non-uniformity can be present in electroplating applications, independently of radial non-uniformity, and in some applications may be the predominant type of non-uniformity that needs to be controlled. It often arises in through resist plating, where a major portion of the wafer is masked with a photoresist coating or similar plating-preventing layer, and the masked pattern of features or feature densities are not azimuthally uniform near the wafer edge. For example, in some cases there may be a technically required chord region of missing pattern features near the notch of the wafer to allow for wafer numbering or handling.
Excessive radial and azimuthal non-uniformity can lead to non-functional chips. Therefore methods and apparatus for improving plating uniformity are needed.